Video Format Timing Explained: Pixel Clock, Active Area and Blanking

Whether it is an external video interface like HDMI or DP, or an internal panel interface like LVDS, V-by-One or eDP, what travels across is the same thing — a video signal sent pixel by pixel at a fixed beat. The set of parameters describing this "beat" is the video timing. Many issues seen in pattern testing and whole-set testing — corrupted images, shifts, rolling pictures — come from mismatched timing parameters. This article explains the core timing concepts with two diagrams.

1. Pixel Clock

The pixel clock is the "heartbeat" of a video signal: every clock cycle, the interface transfers one pixel of data. The faster the clock, the more pixels transferred per unit time, and the higher the supported resolution and refresh rate. For example, the typical pixel clock of 1080P@60Hz is 148.5MHz — 148.5 million pixels per second.

2. Anatomy of a Line: Active Area and Horizontal Blanking

A video signal is transmitted line by line. A line is not all picture content — it has two parts:

• Active Video: the part that actually carries picture pixels, e.g. 1920 active pixels;
• Horizontal Blanking (H-Blanking): the "blank" intervals before and after the active area, further divided into Front Porch, H-Sync and Back Porch. The sync pulse tells the receiver "this line is over — get ready for the next", while the front and back porches are buffer intervals on either side of the sync pulse.

Sync signals have another important attribute —Polarity: H-Sync Polarity and V-Sync Polarity They specify whether the horizontal and vertical sync pulses are "positive" (high during the pulse) or "negative" (low during the pulse). The receiver must detect sync edges at the correct polarity — a reversed setting causes sync failure or picture anomalies — so every standard timing explicitly marks both polarity parameters.

3. Anatomy of a Frame: Vertical Blanking

A frame consists of many lines, and likewise not all lines show picture. The lines beyond the active lines (e.g. 1080) belong to the Vertical Blanking (V-Blanking), which contains the V-Sync signal telling the receiver "this frame is over — return to the top for the next". Using the H- and V-sync signals, the display reconstructs a one-dimensional pixel stream into a two-dimensional picture.

4. How the Key Parameters Relate

Frame rate, resolution and pixel clock constrain each other as follows:

• Total pixels per line = active pixels + horizontal blanking (front porch + H-sync + back porch)
• Total lines = active lines + vertical blanking lines
• Frame rate = pixel clock ÷ (total pixels per line × total lines)

Take the most common 1080P@60Hz (CEA-861 standard) as an example:

Parameter	Value	Notes
Active area	1920×1080	Actual picture pixels
H front porch / H-sync / H back porch	88 / 44 / 148	Horizontal blanking totals 280 pixels
Total pixels per line	2200	1920 + 280
V front porch / V-sync / V back porch	4 / 5 / 36	Vertical blanking totals 45 lines
Total lines	1125	1080 + 45
H-Sync Polarity	Positive (+)	Sync pulse active-high
V-Sync Polarity	Positive (+)	Sync pulse active-high
Pixel clock	148.5MHz	2200×1125×60 = 148.5M

5. What It Means for Display Testing

Panels and whole sets are extremely strict about timing: wrong parameters cause at best picture shift or flicker, at worst a panel that will not light up at all. An LCM signal source must output every timing parameter exactly per the panel datasheet — this is the core capability of Yuanwei Technology’s signal source products: hundreds of built-in standard timings, individually programmable front/back porch and sync width parameters, and 8K ultra-HD timing output, covering pattern testing, aging and functional testing for all kinds of panels and whole sets.